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Antikode Sub Ops

Custom silicon for

Antikode Sub Ops is a Jakarta-based fabless design house. We license silicon-proven embedded RISC-V cores and AI accelerator IP, and we deliver custom RTL and FPGA-to-ASIC services on TSMC 28nm and GF 22FDX. Founded 2018, 47 IPs in production, 220M+ units shipped

0+Silicon-proven IPs
0+ASIC tape-outs
0%Units shipped
silicon

A full design house, not a catalogue.

Silicon-proven IPs

Embedded RISC-V cores, AI accelerators, and bus controllers — all delivered with sign-off collateral, characterisation reports, and production tape-out evidence.

FPGA-to-ASIC migration

Structural audit, RTL hardening, DFT insertion, and full physical-design hand-off on TSMC 28nm / 22ULL and GlobalFoundries 22FDX. Twelve customer ASICs delivered to date.

Verification services

UVM environments, formal sign-off, and full RISC-V Architecture Test compliance. Our verification practice typically achieves 95%+ functional coverage on first regression closure.

antikode build framework
Synthesis snapshot

Open the report.
Read the timing.

A representative synthesis run of the Antikode RV-32IM core on TSMC 22ULL — the same flow that gates every public release. Numbers are from the v1.2 reference build at the slow-slow corner.

Worst-case 480 MHz

Slow-slow, 0.72 V, 125 °C on TSMC 22ULL. 1.05 GHz at the typical corner.

38 kGE footprint

Synthesisable area without the optional MAC unit. 6.4 µW/MHz dynamic power.

96.4% coverage

UVM functional coverage on the v1.2 regression. RISC-V Architecture Test Suite passes 100%.

PDK-agnostic flow

Same RTL targets TSMC 22ULL / 28nm and GF 22FDX. Memory wrappers swap, control logic does not.

Two ways to engage.

License a silicon-proven IP, or commission a custom design end to end.

Antikode ImagerMost popular

IP licensing

Per-tape-out and per-unit royalty licensing for the RV-32IM embedded core, the AnyVision-AI accelerator, and our bus and peripheral library. Comes with RTL, sign-off scripts, UVM testbench, characterisation report, and integration support for one tape-out cycle.

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macOSmacOS
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Request a datasheet
Custom

Custom RTL & ASIC service

Full design service from architecture spec to GDSII hand-off. We work as an extension of your team on TSMC 28nm / 22ULL and GlobalFoundries 22FDX, including FPGA-to-ASIC migration, automotive (AEC-Q100, ASIL-B) and rad-tolerant variants. Twelve customer ASICs delivered.

$ wget https://dl.antikode.com/nanopi-r6s/Noble_current_minimal
$ wget https://dl.antikode.com/nanopi-r6s/Noble_current_minimal.sha
$ sha256sum -c *.sha
Noble_current_minimal: OK
$ xzcat *.img.xz | sudo dd of=/dev/mmcblk0 bs=1M status=progress

By the numbers.

47 silicon-proven IPs

In production across consumer, industrial, automotive, and instrumentation customers. Each delivered with a full characterisation report from a real tape-out.

12 ASIC tape-outs

Customer ASICs delivered on TSMC 28nm and 22ULL, GlobalFoundries 22FDX. Eleven first-pass functional, one respin (an analog issue, not RTL).

220M+ units shipped

Cumulative volume of designs using Antikode IP — consumer SoCs, industrial controllers, and now an automotive Tier-2 BMS controller in qualification.